Computers

  2010 FEB 25 - (VerticalNews.com) -- According to recent research from the United States, "Modeling the effect of coupling-noise on circuit delay is a key issue in static timing analysis and involves the victim-aggressor alignment problem. As delay-noise strongly depends on the skew between the victim-aggressor driver input transitions, it is not possible a priori identify the victim-driver input transition that results in the worst-case delay-noise. ...read more

  2010 FEB 25 - (VerticalNews.com) -- "This paper presents a new at-speed logic built-in self-test (BIST) architecture supporting two launch-on-capture schemes, namely aligned double-capture and staggered double-capture, for testing multi-frequency synchronous and asynchronous clock domains in a scan-based BIST design. The proposed architecture also includes BIST debug and diagnosis circuitry to help locate BIST failures," scientists writing in the journal IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems report ...read more

  2010 FEB 25 - (VerticalNews.com) -- According to recent research from Fukuoka, Japan, "With the scaling of complementary metal-oxidesemiconductor (CMOS) technology into the nanometer regime, the overshooting effect due to the input-to-output coupling capacitance has more significant influence on CMOS gate analysis, especially on CMOS gate static timing analysis. In this paper, the overshooting effect is modeled for CMOS inverter delay analysis in nanometer technologies. ...read more